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june 2004 1/23 rev. 1.2 stv6411a audio/video switch matrix main features i2c bus control standby mode with interrupt signal output video section 4 cvbs inputs, 3 cvbs outputs (one with selectable chroma trap filter) 4 y/c inputs, 2 y/c outputs 6db gain on all cvbs/y and c outputs 1 y/c adder 2 rgb/fb inputs, 1 rgb/fb output with 6db adjustable gain video muting on all the outputs 2 slow blanking inputs/outputs sync bottom clamp on all cvbs/y and rgb inputs, average on c inputs bandwidth : 15mhz crosstalk : 60db typ. audio section 4 stereo inputs, 3 stereo outputs (two with level adjustment) mono sound output stereo to mono capability on all scarts audio muting on all the outputs description the stv6411a is a highly integrated i 2 c bus-con- trolled audio and video switch matrix, optimized for use in digital set-top box applications. it pro- vides all the audio and video routings required in a full three scart set-top box design. it is also fully pin compatible with stv6410a, the two scart ver- sion. tqfp64 (10x10x1.4mm) (full plastic plastic quad flat pack) order code: stv6411ad 1
stv6411a 2/23 figure 1. pin connections 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 rout_tv gnda rin_tv v cca ycvbsin_tv v ref gout_tv lout_vcr bout_tv rout_vcr lout_cinch rout_cinch cin_tv lin_tv lin_vcr ycvbsin_vcr fbout_tv fbin_vcr (see note 1) fbin_enc add scl sda v cc12 nc slb_tv nc gndv1 slb_vcr rin_vcr (see note 1) gin_vcr (see note 1) nc bin_vcr (see note 1) rcout_tv v cc1 cvbsin_stb nc ycvbsin_enc lout_tv ycvbsout_tv nc cout_vcr nc ycvbsout_vcr aout_rf vout_rf gndv3 filter v cc3 nc gndv2 v cc2 nc nc yin_enc rin_stb cin_enc rcin_enc lin_stb rin_enc gin_enc lin_enc bin_enc rin_vcr cin_vcr 1
stv6411a 3/23 pin description pin n function description 1 rcout_tv red/chroma output, to tv scart 2 lout_tv audio left output, to tv scart 3 ycvbsout_tv y/cvbs output, to tv scart 4 nc not connected 5 cout_vcr chroma output, to vcr scart 6 nc not connected 7 ycvbsout_vcr y/cvbs output, to vcr scart 8 aout_rf audio (l+r) output to rf modulator 9 vout_rf video (cvbs) output to rf modulator 10 gndv3 video switches ground 3 11 filter chroma trap filter 12 v ccv3 video switches supply 3 (8v) 13 nc not connected 14 gndv2 video switches ground 2 15 nc not connected 16 v ccv2 video switches supply 2 (8v) 17 fbout_tv fast blanking output, to tv scart 18 fbin_vcr (see note 1) fast blanking input, from vcr scart 19 fbin_enc fast blanking input, from encoder 20 add i 2 c bus ic address programmation 21 scl i 2 c bus clock 22 sda i 2 c bus data 23 v cc12 slow blanking power supply (12v) 24 nc not connected 25 slb_tv slow blanking input/ouput from tv 26 nc not connected 27 slb_vcr slow blanking input/ouput from vcr 28 rcin_vcr (see note 1) red/chroma input, from vcr scart 29 gndv1 video switches ground 1 30 gin_vcr (see note 1) green input, from vcr scart 31 nc not connected 32 bin_vcr (see note 1) blue input, from vcr scart 33 v ccv1 video switches supply 1 (8v) 34 cvbsin_stb cvbs input from stb 35 nc not connected 36 ycvbsin_enc y/cvbs input from encoder 37 nc not connected 38 yin_enc y input, from encoder 39 rin_stb audio right input, from stb 40 cin_enc chroma input, from encoder 41 lin_stb audio left input, from stb 42 rcin_enc red/chroma input, from encoder 43 rin_enc audio right input, from encoder 44 gin_enc green input, from encoder 45 lin_enc audio left input, from encoder 46 bin_enc blue input, from encoder 47 rin_vcr audio right input, from vcr scart 1
stv6411a 4/23 notes: 1. pins (xx_vcr) are identified as xx_aux in stv6410a. 2. in application, all unused pins should be left open or high frequency bypassed to ground. 48 cin_vcr chroma input, from vcr scart 49 lin_vcr audio left input, from vcr 50 ycvbsin_vcr y/cvbs input from vcr scart 51 v ref voltage reference decoupling 52 ycvbsin_tv y/cvbs input, from tv scart 53 lin_tv audio left input, from tv scart 54 cin_tv chroma input, from tv scart 55 v cca audio switches supply (8v) 56 rin_tv audio right input, from tv scart 57 gnda audio switches ground 58 rout_cinch audio right output, to cinch 59 lout_cinch audio left output, to cinch 60 rout_vcr audio right output, to vcr scart 61 bout_tv blue output, to tv scart 62 lout_vcr audio left output, to vcr scart 63 gout_tv green output, to tv scart 64 rout_tv audio right output, to tv scart pin n function description 1
stv6411a 5/23 figure 2. block diagram note 1 : pins (xx_vcr) are identified as xx_aux in stv6410a. fb switch 4v 0v rgb switch c switch y/cvbs switch c switch y/cvbs switch vcr switch tv switch 64 6db 6db 6db 6db 6db 6db 0/6db 0/6db -14db 0/6db -14db 0/6db stereo/ mono 2 lout_tv rout_tv 8 aout_rf 60 62 rout_vcr lout_vcr 58 59 lout_cinch rout_cinch 7 5 cout_vcr ycvbsout_vcr 25 27 slow blank, i/o monitor slb_tv slb_vcr 3 ycvbs/out_tv 6db 61 63 17 gout_tv bout_tv fbout_tv 1 rcout_tv 9 vout_rf 11 filter trap b_enc b_vcr b_enc g_enc g_vcr r/c_enc r_vcr mute r/c_enc c_enc c_vcr mute mute mute mute mute mute y_enc cvbs_stb cvbs/y_vcr cvbs/y_enc l_enc l_stb l_vcr r_enc r_stb r_vcr l_enc l_stb l_tv r_enc r_stb r_tv r/c_enc c_enc c_tv cvbs/y_tv cvbs_stb cvbs/y_enc y_enc 43 39 56 47 53 49 45 41 38 34 52 50 36 54 48 40 42 28 30 44 46 32 18 19 fbin_enc fbin_vcr (see note 1) bin_enc bin_vcr (see note 1) gin_enc gin_vcr (see note 1) rcin_enc rin_vcr (see note 1) cin_enc cin_vcr cin_tv ycvbsin_enc ycvbsin_vcr cvbsin_stb ycvbsin_tv yin_enc lin_enc lin_stb lin_tv lin_vcr rin_enc rin_stb rin_tv rin_vcr stv6411a stereo/ mono i 2 c bus decoder scl sda 21 22 1
stv6411a 6/23 absolute maximum ratings thermal data electrical characteristics t amb = 25oc, av cc = vv cc = 8v, v cc12 = 12v, r louta = 10k , r ga = 600 , r gv = 50 , r loutv = 4.7k , unless otherwise specified. symbol parameter value unit av cc, vv cc supply voltage for audio and video sections 10 v v i voltage at pin i to gnd. except sda, scl at 5.5v max 0, v cc v v cc12 supply voltage for slow blanking sections 13.2 v v slbk voltage at slow blanking pins to gnd 0, v cc12 v v esd maximum esd voltage allowed (100pf capacitor discharged through 1.5k serial resistor - human body model) 4 kv t oper operating ambient temperature 0, +70 o c t stg storage temperature -20, +150 o c symbol parameter+ value unit r th (j-a) junction-ambient thermal resistance max.. 68 c/w symbol parameter test conditions min. typ. max. unit av cc audio operating supply voltage 7.5 8 8.5 v vv cc video operating supply voltage 7.5 8 8.5 v v cc12 slow blanking control supply voltage 11.2 12 12.8 v active (all channels on) i cca audio supply current av cc = 8v, no input signal 10 15 ma i ccv video supply current (iccv1 + iccv2 + iccv3) vv cc = 8v, no input signal 65 80 ma i cc12 12v supply current v cc12 = 12v slblk input mode slblk output mode, no load 0 2.0 2 3 a ma standby (all channels off) i ccastd audio supply current in stand by mode av cc = 8v 1.2 ma i ccvstd video supply current in stand by mode (i ccv1 + i ccv2 + i ccv3 ) vv cc = 8v 9 ma 1
stv6411a 7/23 electrical characteristics (cont?d) t amb = 25oc, av cc = vv cc = 8v, v cc12 = 12v, r louta = 10k , r ga = 600 , r gv = 50 , r loutv = 4.7k , unless otherwise specified. symbol parameter test conditions min. typ. max. unit audio section svr100 supply voltage rejection v ripple = 500mv rms at f = 100hz, gain = 0db, v ref filter cap = 47f v ref filter cap = 220f 60 72 82 db db svr1k supply voltage rejection v ripple = 500mv rms at f = 1khz gain = 0db 70 80 db v indc input dc level av cc = 8v v cc /2 v v inac input signal amplitude 2 v rms r in input resistance 45 55 k r inmatch input resistance matching 1 10 % f range bandwith -3db, 0.5v rms , r l = 10k , gain = 0db 50 khz flatness spread of gain in audio band 0.5v rms , 20hz to 20khz, gain = 0db 0.5 db cs channel separation (from audio inputs) between l &r of tv outputs v in = 0.5v rms , f = 1khz, on one input, r l =10k , gain = 0db 80 70 90 74 db db ci channel isolation from video inputs v in = 1 v pp , f = 15khz, on one input, r l = 10k , gain = 0db 70 85 db v out output dc level av cc = 8v v cc /2 v v off dc offset change switching between inputs 1 15 mv r out output resistance 60 eni equivalent input voltage noise bw = 20hz, 20khz, gain = 0db 5 v g0 0db gain 0.5v rms , r l = 10k , gain = 0db -0.5 +0.5 db g step step of gain -14db to +6db 1.75 2 2.25 db g match1 gain matching between different inputs on one output v in = 0.5v rms , 1khz, gain = 0db -0.5 0.5 db g match2 gain matching between left/right outputs of one input channel v in = 0.5v rms , 1khz, gain = 0db -0.5 0.5 db thd total harmonic distorsion 1khz, lpf @ 80khz v in = v out = 0.5v rms v in = v out = 2v rms 0.002 0.003 0.05 % % v cl output clipping level thd = 0.2%, 1khz 2.1 2.25 v rms r l output load resistance v in = 1v rms , thd = 0.3%, gain = 0db 22.25 k mute mute suppression v in = 0.5v rms , on one input 90 db
stv6411a 8/23 electrical characteristics (cont?d) t amb = 25oc, av cc = vv cc = 8v, v cc12 = 12v, r louta = 10k , r ga = 600 , r gv = 50 , r loutv = 4.7k , unless otherwise specified. symbol parameter test conditions min. typ. max. unit video section v dcin dc input level bottom synch pulse 2 v i clamp clamping current at v dcin - 400mv 1 2 ma i leak input leakage current v in = v dcin + 1v 1 10 a c in input capacitance 2 pf v in max input signal vv cc = 8v 1.5 2 v pp dyn dynamic output signal vv cc = 8v 3 4 v pp bw bandwidth at -3db y/cvbs rgb y/c mixer (on rf out) v in = 1v pp v in = 1vp p v iny = 1v pp , v inc = muted 15 15 10 18 18 15 mhz mhz mhz g rgbm gain matching between r, g, b v in = 1v pp , gain set to 6db -0.3 0 0.3 db g rgbstep step of gain 3db to 6db 0.75 1 1.25 db g ycvbs gain on y/cvbs channels v in = 1v pp 5.5 6 6.5 db g ycvbsm gain matching between y, cvbs inputs v in = 1v pp -0.5 0 0.5 db dc out dc output voltage bottom sync pulse 1.1 1.3 v dc out rf rf output voltage bottom sync pulse 1.5 1.8 v dphi differential phase v in = 1v pp , 4.43mhz 0.7 o dg differential gain v in = 1v pp , 4.43mhz 0.4 % mute mute suppression v in = 1v pp at f = 5mhz on one input -55 db i vout output current v out dc @ +1v 1.5 2.5 ma chroma section v dcin dc input level 3 v r in input resistance 45 55 k c in input capacitance 2 pf v in max input signal 1.5 2 v pp dyn dynamic output signal 3 3.8 v dc out dc output voltage 1.9 2.3 v cbw chroma bandwidth c in = 1v pp at - 3db 10 19 mhz ct crosstalk isolation between channel v in = 1v pp at f = 5mhz on one input 52 db r out output resistance 50 g outc gain at outc v in = 1v pp 5.5 6 6.5 db g cm gain matching between c inputs v in = 1v pp -0.5 0 0.5 db mute mute suppression v in = 1v pp at f = 5mhz on one input 55 db ctoydel chroma to luma delay, source y/c pin other than rf_out 1 v pp @ 5mhz 4 20 ns ctoydel chroma to luma delay, source y/c pin rf_out 4 20 ns
stv6411a 9/23 electrical characteristics (cont?d) t amb = 25oc, av cc = vv cc = 8v, v cc12 = 12v, r louta = 10k , r ga = 600 , r gv = 50 , r loutv = 4.7k , unless otherwise specified. symbol parameter test conditions min. typ. max. unit slow blanking section input (input mode v cc8 = 8v 5%) slblow input low level threshold 2.5 3.25 4 v slbhigh input high level threshold 7.5 8.25 9 v i in input current 50 100 a output (output mode v cc12 = 12v 5%, v cc8 = 8v 5%, r load >> 10k ) slblow output low level (int. tv) 0 0.02 1.5 v slbmed output med level (ext. 16/9) 5 5.75 6.5 v slbhigh output high level (ext. 4/3) 10 11 12 v fast blanking section input (input mode v ccv = 8v 5%) fblow/high input low/high level threshold 0.4 0.7 0.9 v i in input current 2 10 a output (output mode v ccv = 8v 5%, r load >> 1k ) fb low output low level i in = 1.0ma i in = 0.2ma 0 0.7 0.3 v v fb high output high level i out = 1.0ma 3.6 4 4.4 v fb del fast blanking to rgb delay at 50% on digital rgb transients, at 2.7v on fb rise transient, at1.5v on fb fall c load = 10pf max 30 ns fb trans fast blanking transitions at fb output rise time fall time c load = 10pf max between 10% and 90% between 90% and 10% 30 30 ns ns address selection input addsel_l address selection low level 0 0.2 v addsel_h address selection high level 4 v cc (8v) v i leak leakage current 10 a
stv6411a 10/23 electrical characteristics (cont?d) t amb = 25oc, av cc = vv cc = 8v, v cc12 = 12v, r louta = 10k , r ga = 600 , r gv = 50 , r loutv = 4.7k , unless otherwise specified. symbol parameter test conditions min. typ. max. unit i 2 c bus characteristics scl v il low level input voltage -0.3 1.5 v v ih high level input voltage 3 5.5 v i li input leakage current v in = 0 to 5.5v -10 0 10 a f scl clock frequency 0 100 khz t r input rise time 1.5v to 3v 1 s t f input fall time 1.5v to 3v 300 ns c l input capacitance 10 pf sda v il low level input voltage -0.3 1.5 v v ih high level input voltage 3 5.5 v i li input leakage current v in = 0 to 5.5v -10 0 10 a c l input capacitance 10 pf t r input rise time 1.5v to 3v 1 s t f input fall time 1.5v to 3v 300 ns v ol low level output voltage i ol = 3ma 0.4 v t f output fall time 3v to 1.5v 250 ns c l load capacitance 400 pf timing t low clock low period 4.7 s t high clock high period 4 s t su, dat data set-up time 250 ns t hd, dat data hold time 0 340 ns t su, sto set-up time from clock high to stop 4 s t buf start set-up time following a stop 4.7 s t hd, sta start hold time 4 s t su, sta start set-up time following clock low to high transition 4.7 s
stv6411a 11/23 i2c bus selection data transfers follow the usual i2c format: after the start condition (s), a 7-bit slave address is sent, fol- lowed by an eighth bit which is a data direction bit (w). a 8-bit subadress is sent to select a register, fol- lowed by a 8-bit data word to put in it. the ic's i2c bus decoder permits the automatic incrementation mode in write mode. string format write only mode (s : start condition, p : stop condition, a : acknowledge) read only mode slave address auto increment mode i 2 c bus address write address: 1001 01x0 read address: 1001 01x1 address selection pin grounded:x = 0, write address = 94hex, read address = 95hex address selection pin to supply:x = 1, write address = 96hex, read address = 97hex input signals summary (write mode) note: not used data must be put to "0". s slave address 0 a subaddress a data a p s slave address 1 a data a p address a6 a5 a4 a3 a2 a1 a0 value 1 0 0 1 0 1 x s slave address 0 a subaddress a data0 a data1 a ........ datan a p reg. address (hex) data d7 data d6 data d5 data d4 data d3 data d2 data d1 data d0 00 tv audio level adjustment 0/6dbgain tv mono tv audio outputs control 01 cinch audio level adjustment 0/6dbgain not used cinch audio outputs control 02 aux mono vcr mono aux audio outputs control vcr audio outputs control 03 not used tv chroma mute y/cvbs & chroma tv outputs control tv rf ouput control tv r/c ouput control 04 tv rgb outputs control tv fb output control rgb gain r/csub aux clamp r/csub en- coder clamp 05 aux chro- ma mute aux y/cvbs & chroma outputs control vcr chro- ma mute vcr y/cvbs & chroma outputs control 06 not used not used slow blanking aux scart slow blanking vcr scart slow blanking tv scart 07 vcr output off aux output off tv output off encod clamp disa- ble tv clamp disable astb clamp disa- ble vcr clamp disable aux clamp disable 08 not used not used not used not used not used not used rf mod output off cinch out- put off
stv6411a 12/23 i2c bus selection (cont?d) input signals (write mode) data byte tv audio output audio cinch output register address (hex) description bits data comments d7 d6 d5 d4 d3 d2 d1 d0 00 audio output selection 3 xxxxx0 0 0 muted xxxxx0 0 1 aux inputs selected xxxxx0 1 0 vcr inputs selected xxxxx0 1 1 astb inputs selected xxxxx1 0 0 not allowed xxxxx1 0 1 encoder inputs selected xxxxx1 1 0 not allowed xxxxx1 1 1 not allowed stereo or mono mode 1 xxxx0xxx 0 = stereo xxxx1xxx 1 = mono 6db extra gain 1 xxx0xxxx 0 = 0db xxx1xxxx 1 = +6db level adjustment 3 0 0 0xxxxx 0db adjustment 1 1 1xxxxx -14db adjustment (-2db/step) register address (hex) description bits data comments d7 d6 d5 d4 d3 d2 d1 d0 01 audio output selection 3 xxxxx0 0 0 muted xxxxx0 0 1 aux inputs selected xxxxx0 1 0 vcr inputs selected xxxxx0 1 1 astb inputs selected xxxxx1 0 0 tv inputs selected xxxxx1 0 1 encoder input selected xxxxx1 1 0 not allowed xxxxx1 1 1 not allowed 6db extra gain 1 xxx0xxxx 0 = 0db xxx1xxxx 1 = +6db level adjustment 3 0 0 0xxxxx 0db adjustment 1 1 1xxxxx -14db adjustment (-2db/step)
stv6411a 13/23 i2c bus selection (cont?d) vcr and aux audio outputs selection register address (hex) description bits data comments d7 d6 d5 d4 d3 d2 d1 d0 02 vcr audio output selection 3 xxxxx0 0 0 muted xxxxx0 0 1 aux inputs selected xxxxx0 1 0 not allowed xxxxx0 1 1 astb inputs selected xxxxx1 0 0 tv inputs selected xxxxx1 0 1 encoder inputs selected xxxxx1 1 0 not allowed xxxxx1 1 1 not allowed x0xxxxxx 0 = stereo x1xxxxxx 1 = mono aux audio output selection 3 xx000xxx muted xx001xxx not allowed x x 0 1 0 x x x vcr inputs selected x x 0 1 1 x x x astb inputs selected x x 1 0 0 x x x tv inputs selected x x 1 0 1 x x x encoder inputs selected xx110xxx not allowed xx111xxx not allowed 0xxxxxxx 0 = stereo 1xxxxxxx 1 = mono
stv6411a 14/23 i2c bus selection (cont?d) tv video outputs register address (hex) description bits data comments d7 d6 d5 d4 d3 d2 d1 d0 03 r/c tv output selection 1 xxxxxxx0red signal selected xxxxxxx1chroma signal selected rf output : adder control and chroma subcarrier filter selection 2 xxxxxx0xcvbs to rf output xxxxxx1xy+c to rf output xxxxx0xxfilter not active xxxxx1xxfilter active y/cvbs output and chroma signal selection 3 x x 0 0 0 x x x y/cvbs & chroma muted x x 0 0 1 x x x y/cvbs_aux & r/c_aux x x 0 1 0 x x x y_aux & r/c_aux x x 0 1 1 x x x y/cvbs _vcr & c_vcr x x 1 0 0 x x x cvbs_astb & chr. muted x x 1 0 1 x x x y/cvbs_enc & r/c_enc x x 1 1 0 x x x y_enc & c_enc xx111xxxnot allowed chroma switch muting 1 x0xxxxxx chroma output controlled by 5- d4-d3 from register 03. x1xxxxxxchroma output forced to mute. 04 encoder r/csub clamp 1 xxxxxxx0bottom level clamp xxxxxxx1average level clamp aux r/csub clamp 1 xxxxxx0xbottom level clamp xxxxxx1xaverage level clamp rgb output gain 2 xxxx0 0xx+6db gain x x x x 1 1 x x +3db gain (1db/step) fb output 2 x x 0 0 x x x x fb forced to low level x x 0 1 x x x x fb forced to high level x x 1 0 x x x x fb from encoder xx1 1xxxxfb from aux rgb ouputs selection 2 0 0xxxxxxmuted 0 1xxxxxxrgb_encoder selected 1 0xxxxxxrgb_aux selected 1 1xxxxxxnot allowed
stv6411a 15/23 i2c bus selection (cont?d) vcr and aux video outputs slow blanking switches register address (hex) description bits data comments d7 d6 d5 d4 d3 d2 d1 d0 05 vcr y/cvbs & chroma outputs selection 3 xxxxx0 0 0 y/cvbs & chroma muted xxxxx0 0 1 y/cvbs_aux & r/c_aux xxxxx0 1 0 y_aux & r/c_aux xxxxx0 1 1 not allowed xxxxx1 0 0 cvbs_astb & chr. muted xxxxx1 0 1 y/cvbs_enc & r/c_enc xxxxx1 1 0 y_enc & c_enc xxxxx1 1 1 y/cvbs_tv & c_tv vcr chroma output muting 1 xxxx0xxx chroma output controlled by d2-d1-d0 from register 05. xxxx1xxx chroma output forced to mute. aux video output selection 3 x 0 0 0 x x x x y/cvbs & chroma muted x0 0 1xxxx not allowed x0 1 0xxxx not allowed x0 1 1xxxx y/cvbs_vcr & c_vcr x1 0 0xxxx cvbs_astb & chr. muted x 1 0 1 x x x x y/cvbs_enc & r/c_enc x 1 1 0 x x x x y_enc & c_enc x 1 1 1 x x x x y/cvbs _tv & c_tv aux chroma output muting 1 0xxxxxxx chroma output controlled by d6-d5-d4 from register 05. 1xxxxxxx chroma output forced to mute. register address (hex) description bits data comments d7 d6 d5 d4 d3 d2 d1 d0 06 slow blanking tv scart 2 xxxxxx0 0 input mode xxxxxx0 1 output < 2v xxxxxx1 0 output 16/9 format xxxxxx1 1 output 4/3 format slow blanking vcr scart 2 xxxx0 0xx input mode xxxx0 1xx output < 2v xxxx1 0xx output 16/9 format xxxx1 1xx output 4/3 format slow blanking aux scart 2 xx0 0xxxx input mode xx0 1xxxx output < 2v x x 1 0 x x x x output 16/9 format x x 1 1 x x x x output 4/3 format
stv6411a 16/23 i2c bus selection (cont?d) vcr and aux video outputs output sigans (read mode) data byte register address (hex) description bits data comments d7 d6 d5 d4 d3 d2 d1 d0 07 aux clamps disabling 1 xxxxxxx0 clamp active xxxxxxx1 clamp disabled vcr clamps disabling 1 xxxxxx0x clamp active xxxxxx1x clamp disabled astb clamps disabling 1 xxxxx0xx clamp active xxxxx1xx clamp disabled tv clamps disabling 1 xxxx0xxx clamp active xxxx1xxx clamp disabled encoder clamps disabling 1 x x x 0 x x x x clamp active x x x 1 x x x x clamp disabled tv/rgb output disabling 1 xx0xxxxx audio & video outputs on xx1xxxxx audio & video outputs off aux output disabling 1 x0xxxxxx audio & video outputs on x1xxxxxx audio & video outputs off vcr output disabling 1 0xxxxxxx audio & video outputs on 1xxxxxxx audio & video outputs off 08 cinch output disabling 1 xxxxxxx0 cinch output on xxxxxxx1 cinch output off rf mod output disabling 1 xxxxxx0x rf mod output on xxxxxx1x rf mod output off register address (hex) description bits data comments d7 d6 d5 d4 d3 d2 d1 d0 slow blanking tv scart 2 xxxxxx0 1 input < 2v xxxxxx1 0 input 16/9 format xxxxxx1 1 input 4/3 format slow blanking vcr scart 2 xxxx0 1xx input < 2v xxxx1 0xx input 16/9 format xxxx1 1xx input 4/3 format slow blanking aux scart 2 xx0 1xxxx input < 2v x x 1 0 x x x x input 16/9 format x x 1 1 x x x x input 4/3 format
stv6411a 17/23 i2c bus selection (cont?d) power-on reset - bus regi ster initial conditions power on reset is active when the power supply voltage is below (tbf) volts. not significant bits (x) are preset to "0" register address (hex) data comments d7 d6 d5 d4 d3 d2 d1 d0 00 0 0 0 0 0 0 0 0 audio tv output muted, stereo mode, 0db gain, 0db gain adjustment. 01 0 0 0 0 0 0 0 0 audio cinch output muted, 0 db gain, 0db gain adjustment. 02 0 0 0 0 0 0 0 0 audio vcr output muted, audio aux output muted. 03 0 0 0 0 0 0 0 0 red signal selected on r/c_tv output, cvbs to rf ouput, tv video and chroma switches muted, chroma ouput controlled by d5-d4-d3 from register 03. 04 0 0 0 0 0 0 0 0 encoder r/csub bottom level clamp, aux r/csub bottom level clamp, rgb outputs 6db gain, fb output forced to 0v, rgb outputs muted. 05 0 0 0 0 0 0 0 0 vcr video and chroma switches muted, vcr chroma output controlled by d2-d1-d0 from register 05, aux video and chroma switches muted, aux chroma output controlled by d6-d5-d4 from register 05. 06 0 0 0 0 0 0 0 0 tv scart slow blanking input mode, vcr scart slow blanking input mode, aux scart slow blanking input mode. 07 0 0 0 0 0 0 0 0 aux, vcr, astb, tv, encoder clamps active ; tv/rgb, aux, vcr outputs on. 08 0 0 0 0 0 0 0 0cinch, rf mod outputs on.
stv6411a 18/23 input/output groups figure 3. bottom clamped video inputs (pins 30, 32, 34, 36, 38, 44, 46, 50, 52) figure 4. audio inputs (5 stereo) (pins 39-41, 47-49, 53-56) figure 5. trap filter (pin 11) figure 6. average clamped video inputs (pins 40, 48, 54) figure 7. audio outputs (4 stereo + 1) (pins 58, 59, 60-62, 8) figure 8. video outputs (pins 61, 63, 1, 3, 5, 7, 9) v cc 8v v cc 8v 15k tri 2v + v d protected pad v cc 8v v cc /2 protected pad i b 50k v cc 8v protected pad 100 1k v cc 8v v cc 8v tri 3 v protected pad i b v cc 8v 25k 25k v cc 8v protected pad 60 v cc 8v protected pad 50 v cc 8v 5k 5k
stv6411a 19/23 input/output groups (cont?d) figure 9. vref external capacitor (pin 51) figure 10. input fast blanking (pin 18, 19) figure 11. i2c bus (add) (pin 20) figure 12. slow blanking (pins 25, 27) figure 13. output fast blanking (pin17) figure 14. i2c bus (scl) (pin21) v cc 8v protected pad v cc 8v 40k 40k i b i b v cc 8v protected pad v cc 8v protected pad 10k v cc 12v protected pad 80k 1k 25k 80k v cc 12v v cc 8v protected pad 25k 1k 50 v cc 8v protected pad 10k
stv6411a 20/23 input/output groups (cont?d) figure 15. i2c bus (sda) (pin 22) figure 16. application diagram v cc 8v protected pad 10k acknowledge rf mod r/c g b fast blank cvbs/y c audio l audio r audio l audio r y audio l audio r cvbs r g b fast blank cvbs/y audio l audio r c cvbs/y audio l audio r c slow blank cinch output scart2 vcr analog stb encoder r/c g b fast blank cvbs/y audio l audio r cvbs/y audio l audio r slow blank scart1 tv cvbs audio l+r stv6411a c r audio switches slow blank, i/o control r, g, b, fb switches cvbs/y switches chroma switches
stv6411a 21/23 application note 1 - audio part 1.a - inputs the audio inputs are designed to follow sources up to (at least) 2v rms (that is around 6v pp ) with an expected dc level of v cc /2 (4v typ.). that's why the device is providing this dc polarization. that means that in most of the cases the inputs are ac coupled via chemical capacitors. the recommend- ed values are 1f, 2.2f or 4.7f (internal polar. is made via a 50k resistor). i want to point out that the internal polarization is filtered by an exter- nal capacitor (on pin called `v ref '). this capacitor contribute to good performance of the device. its value should be 47f or more (coupled with an 47nf hf cap. for internal video references). figure 17. audio inputs nb: in some particular cases (loopback from out- puts to inputs) the ac coupling capacitor can be removed... but some small offsets in the audio chain can cause some noise while switching from one input to another. 1.b - outputs audio output buffers are able to provide more than 2.1v rms (around 6v pp ) on a typical load of 10k (in fact a 2k load is acceptable). the dc level is once more v cc /2 for best dynamic performance. usually some ac coupling capacitors are used at the outputs. to drive some typical 10k loads, it is normal to use capacitors with value 5 to 10 times the value of the input capacitors. that gives a val- ue between 4.7f and 47f. moreover it can be a good idea to insert resistors (220 or 470 ) in the audio outputs. that will provide a protection for output stages. no external drivers or buffers are needed in typical use of the device. figure 18. audio outputs 2 - video part 2.a - inputs video inputs need to be ac coupled. but only some small capacitor values are requested thanks to the internal clamps provided by these devices. usually some 100nf hf capacitors (47nf to 220nf) are enough to provide good performances on y, cvbs,rgb and c inputs. chrominance inputs : - average clamp - that means that the dc is measured as the average value of the input signal and set to an internal ref- erence (close to 3v). the dynamic allowed is more than 1.5v. rgb, y, cvbs inputs : - bottom sync top clamp - that means that the dc level is measured at the lowest value of the input signal and set to an inter- nal reference (close to 2v). the dynamic allowed is more than 1.5v. figure 19. video inputs 2.b - outputs on these devices the video outputs are not able to drive 150 . that means that external buffers (one simple npn-transistor per output) are needed. to reduce the external components, the output dc level have been chosen to allow a direct drive of the base of the output follower (npn). the emitters of the npns will be polarized to ground via 1k resistors (more or less) and will drive the outputs through some 75 resistors. do not forget to bufferize your favourite uhf modula- tor video input... chrominance outputs have a dc of 2.3v (it is an average value) and luminance type output have a dc of 1.3v (it is a bottom value). figure 20. video (and fast blanking) outputs 220 4.7 f 12k audio in stv6411a l/r audio 470 4.7 f stv6411a l/r audio audio out 220 100nf 75 video in stv6411a y/c/cvbs/rgb (4.7k )1k 75 stv6411a video out video
stv6411a 22/23 application note (cont?d) 2.c - fast blanking fast blanking signal is used to make an equip- ment consider its rgb inputs for full-screen dis- play or fast insertion (osd, etc.). the output of such signal is exactly managed in the same way as rgb (that is important for levels and delays). the input is dc coupled (insert a few hundreds ohms resistors for external input). 2.d - slow blanking slow blanking signal is used to make an equip- ment consider an external input (e.g. cvbs and sound). the input/output of such signal is very simple, dc coupled (insert a few hundreds ohms resistors for external i/o). notice that this function is requesting a 12v power supply (on pin v cc12 ). this pin can be left open (not pulled down) if this function is not used. 3 - i 2 c bus 3.a - address you can choose the address of the device by set- ting the pin add to ground or to v dd . the former selects 94h and the latter selects 96h. these val- ues correspond to the writeable (or control) regis- ters. change the lowest bits to `1' (that gives 95h and 97h) to read the readable register of the de- vice. one device will answer (acknowledge) to its both addresses 94h and 95h or 96h and 97h. 3.b - write mode this mode is used to control the device, to select switches positions, gains, etc. send a start condition, the address of the device, the address of the register (its number), and the data to put in it. at this point you can send a stop or send the data of the following registers (that is what we call auto-increment). 3.c - read mode this mode is used to read some data such as slow-blanking input signals. send a start condition, the address of the device (+1) and then send one byte clock to read the unique data register. n.b.: do not forget your favourite esd protections for i/o signals of plugs.
stv6411a 23/23 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states www.st.com

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